| 摘要 |
<p>PURPOSE:To set a skew zero by varying the delay of clock signal by means of the external control terminal. CONSTITUTION:When a selection circuit 1 selects the output of clock distribution circuit by means of an external terminal SLA, loop is formed from a selection circuit 1, delay circuit 2, clock distribution circuit 3, and to the selection circuit 1. The loop comprises a ring oscillator, and whose oscillation frequency is observed by an external terminal OUT. By controlling the delay amount of the delay circuit 2 by means of an external control terminal SLB, the oscillation frequency can be adjusted to the specific value. Thus, as the delay time from the clock terminal to register of each integrated circuit can be set to the constant value and the clock skew is determined by the setting accuracy of the delay circuit, the skew becomes zero.</p> |
