| 摘要 |
PURPOSE:To measure the correct delay time of a single logical gate with much higher precision compared with that in the past in a gate delay measuring instrument. CONSTITUTION:By inputting chain gate output signals outputted respectively from two logical gate groups different from each other in the number of stages directly to an exclusive OR circuit 11, and outputting an output signal whose logical level is inverted only during a period corresponding truely to the delay time difference of two chain gate output signals, the possibility of the occurrence of an error in a measured result because the variance of the delay time in two output buffer circuits 12 is superimposed on the output signal like in the past can be avoided and the accuracy of measurement of the delay time of the single logical gate can be much more improved. |
