发明名称 CLOCK SYNCHRONIZATION SYSTEM
摘要 <p>PURPOSE:To prevent the increase of the circuitry monitoring the fluctuation of frequency in the clock synchronization system outputting clocks in synchronism with an input clock. CONSTITUTION:Respective input clocks with dissimilar frequency is frequency- divided into the same cycle by a frequency dividing section 1. One of the frequency division clocks outputted from the section 1 is selected by a selector section 2 and the selected frequency division clock is added as an incoming clock of a synchronization section 3 to take out the synchronization clock in synchronism with the input clock. A frequency fluctuation monitoring section 4 is provided to input an incoming clock to the synchronization section 3 outputted from the selector 2 and monitor the frequency fluctuation of the synchronization clock outputted from the section 3.</p>
申请公布号 JPH05241680(A) 申请公布日期 1993.09.21
申请号 JP19920045451 申请日期 1992.03.03
申请人 FUJITSU LTD 发明人 TANAKA YOKI
分类号 G06F1/04;G06F1/12;(IPC1-7):G06F1/12 主分类号 G06F1/04
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