发明名称 CIRCUIT, COUNTER AND FREQUENCY SYNTHESIZER WITH ADJUSTABLE BIAS CURRENT
摘要 <p>An electronic circuit (100) includes a load stage circuit (116) having at least one FET (118 and 120). The load stage circuit (116) includes an adjustment terminal responsive to an adjustment voltage for controlling the load resistance of the FET (118 and 120). The electronic circuit (100) also includes a bias current generator (124) for generating a bias current. A current steering circuit (122) controls the amount of bias current supplied to the load stage circuit (116). The electronic circuit (100) also includes a plurality of output terminals (112 and 114) for providing an output which is responsive to voltages applied at input terminals (104, 106 and 108) of the current steering circuit (122). Circuit (100) allows for the adjustment of the bias current to the circuit in order to achieve optimum power dissipation over changing operating conditions.</p>
申请公布号 WO1993018587(A1) 申请公布日期 1993.09.16
申请号 US1993001798 申请日期 1993.02.26
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