发明名称 |
PREFETCHING INTO A CACHE TO MINIMIZE MAIN MEMORY ACCESS TIME AND CACHE SIZE IN A COMPUTER SYSTEM |
摘要 |
A cache memory subsystem with a relatively small main cache and a relatively high hit rate. Unpredictable data is stored in a main cache. Predictable data is stored in a set of instruction and data prefetch buffers. A cache subsystem with stride prediction hardware is also described. |
申请公布号 |
WO9318459(A1) |
申请公布日期 |
1993.09.16 |
申请号 |
WO1993US01814 |
申请日期 |
1993.03.03 |
申请人 |
RAMBUS INC. |
发明人 |
KRISHNAMOHAN, KARNAMADAKALA;FARMWALD, PAUL, MICHAEL;WARE, FREDERICK, ABBOTT |
分类号 |
G06F12/02;G06F9/38;G06F12/08 |
主分类号 |
G06F12/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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