发明名称 Floating gate nonvolatile memory with reading while writing capability
摘要 A floating gate nonvolatile memory. The memory includes a first memory array and a second memory array. A first address register is provided for storing a first address for the first memory array. A second address register is provided for storing a second address for the second memory array. A multiplexer is coupled to the first memory array and the second memory array at one end and an output of the memory device at the other end for selectively coupling one of the first memory array and the second memory array to the output at a time. Array select circuitry responsive to an incoming address is provided for selecting the first memory array for a reprogramming operation and the second memory array for a read operation. The array select circuitry directs the first address to the first address register and the second address to the second address register. The array select circuitry controls the multiplexer for coupling the second memory array to the output during the reprogramming operation of the first memory array.
申请公布号 US5245572(A) 申请公布日期 1993.09.14
申请号 US19910738179 申请日期 1991.07.30
申请人 INTEL CORPORATION 发明人 KOSONOCKY, GEORGE A.;WINSTON, MARK D.
分类号 G06F12/00;G06F12/06;G11C7/00;G11C16/02;G11C16/10;G11C17/00 主分类号 G06F12/00
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