| 摘要 |
<p>PURPOSE:To make the speed of the access operation of an address decoder circuit high by a method wherein a transfer gate is installed between a level conversion circuit and an address selection circuit and the level conversion circuit is driven directly by means of a word line. CONSTITUTION:Since an address selection circuit 1 can change an output voltage by changing power-supply voltages VA, VB, VC, to be applied, it can invert a logic in a read/write operation and in an erasure operation. The output of the circuit 1 is transmitted to a level conversion circuit 3 via a transfer gate 2. In the read/write operation, a VBB is set to 0 and a VPP is set to 5V or 12V. As a result, in a nonselection operation, am input voltage of 5V is inverted by the circuit 3 and transmitted to a word line, and the word line is set to 0V. inversely, in a selection operation, the VPP is output to the word line. In an erasure operation, the VPP is set to 5V and the VBB is set to a negative voltage at -10V. in the erasure operation and the nonselection operation, the output of the circuit 1 is set to 0, and the VPP at 5V is output to the word line from the circuit 3.</p> |
