发明名称 FLASH MEMORY REWRITING CIRCUIT
摘要 <p>PURPOSE:To reduce the amount of downloaded data, and shorten a necessary time and reduce the load on a bus by saving information temporarily and downloading only rewritten information. CONSTITUTION:This circuit consists of a CPU 1, an EPROM 2, an SRAM 3, an FRAM(flash memory) 4, a register 5, and an address bus 9 and a data bus 10 which connect them. The register 5 is used to save the information of the FRAM 4. Further, the CPU 1 is connected to an FRAM rewritten information transfer terminal 7 and an FRAM rewritten information file 8 through an RS232C line 6, and the terminal 7 is operated to sends the rewritten information in the file 8 to the CPU 1. Further, information before the FRAM 4 is all erased or rewritten is saved in the register 5 temporarily and the saved information is put back from the register 5 after the FRAM 4 is rewritten.</p>
申请公布号 JPH05233478(A) 申请公布日期 1993.09.10
申请号 JP19920069627 申请日期 1992.02.19
申请人 NEC CORP 发明人 SAWA HANAE
分类号 G06F12/16;G11C16/02;G11C16/06;G11C17/00;(IPC1-7):G06F12/16 主分类号 G06F12/16
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