发明名称 PHASE SYNCHRONIZATION FREQUENCY SYNTHESIZER
摘要 PURPOSE:To reduce a channel changeover time by eliminating a phase error at the mode change. CONSTITUTION:A frequency division ratio setting circuit 17 increases gradually a 1st frequency division ratio M up to a ratio Mo in multi-stage stepwise in the case of channel changeover and gradually increases a 2nd frequency division ratio N in each stage so as to be closest to a desired frequency, where Mo and No are 1st and 2nd frequency division ratios to generate a channel frequency. In this case, the 1st and 2nd frequency division ratios N, M are switched by allowing the frequency division ratio setting circuit 17 to reference a phase synchronizing signal LD from a phase synchronization monitor section 13d and to input the 1st and 2nd frequency division ratios in a next stage to 1st and 2nd variable frequency dividers 12,16 respectively and an output signal frequency Fout of a frequency synthesizer is made coincident with a desired channel frequency by inputting the 1st and 2nd frequency division ratios No, Mo to the 1st and 2nd variable frequency dividers 12,16 finally.
申请公布号 JPH05235787(A) 申请公布日期 1993.09.10
申请号 JP19920030945 申请日期 1992.02.18
申请人 FUJITSU LTD 发明人 WATANABE YASUNOBU;HASE KAZUO;TAKANO TAKESHI
分类号 H03L7/10;H03L7/187;H04B1/04;H04B1/26 主分类号 H03L7/10
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