| 摘要 |
<p>PURPOSE:To avoid a Hi-Z state unfixing the input level of a logic element connected to a bus line when reducing energy consumption by stopping clocks. CONSTITUTION:The input terminal of a logic circuit 111 at an output buffer 11 is connected to the output terminal of a data selector 2, and the output terminal of a logic circuit 112 is connected to input an output permit signal 10 to an output permit signal input terminal 113 and to input a clock stop signal 6 to a clock stop signal input terminal 114. The output terminal of the output buffer 11 is connected to an input/output terminal 5 and one input terminal of a logic circuit 121 at an input buffer 12, and the logic circuit 121 outputs an input signal through an inverter 123. The output terminal of a logic circuit 122 to input a clock stop signal 7 and an output permit signal 9 is connected to the other input terminal of the logic circuit 121. An output data signal 7, input signal 8, clock stop signal 7 and the inverse of the clock stop signal 7 are respectively connected to the input terminal of the data selector 2.</p> |
