| 摘要 |
PURPOSE:To efficiently attain a hierarchical wiring for a circuit including a large wiring inhibiting area such as a macroblock. CONSTITUTION:A wiring area is divided into rough grids (S1), entire cut lines set on a boundary between each rough grid, and crossed by a wring net, are searched (S3), an evaluation value indicating the easiness to select the cut line dividing the wiring area into two so that the congestion of the wiring can be smoothed the most is calculated about plural evaluation items (S4-S5). Then, a weighting is operated to each calculated evaluation value, the total sum of the evaluation values is calculated (S8), the wiring area is divided into two by the cut line in which the total sum of the evaluation values is the minimum among the entire cut lines (S9), positions where the entire wiring nets crossing the cut line are decided (S10), and the similar processing is hierarchically repeated until the partial area divided into two can be the desired minimum area (S11), so that a rough wiring path on the rough grid for the entire wiring nets can be decided. Thus, the wiring inhibiting area can be considered, and the wiring path whose quality is satisfactory in which the congestion of the wiring can be smoothed, can be obtained.
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