发明名称 FORMING METHOD FOR THIN FILM PATTERN
摘要 PURPOSE:To flatten the formation of a conducting pattern, and simplify a manufacturing process, by a method wherein the conducting pattern is formed by forming a metal catalyst layer and laminating a conducting layer on the upper layer of the metal catalyst layer by electroless plating. CONSTITUTION:A resist layer 7 is laminated on the upper surface 1A of a substrate 1 by masking, and a metal catalyst layer 2 is formed by sputtering so as to cover the resist layer 7. The metal catalyst layer 2 is patterned by lift-off eliminating the resist layer 7. An insulating barrier layer 5 is formed by spreading insulating material like polyimide and curing it. Finally, a conducting layer 3 composed of excellent conducting material is laminated on the upper layer of the metal catalyst layer 2 by electrolness plating, and a first conducting pattern 4-1 is formed in a valley part 6 formed by the insulating barrier 5. Further the resist layer 7 is laminated on the first conducting pattern 4-1 by masking, and a second conducting pattern 4-2 is formed in the similar manner to the above process, thereby flattening the conducting pattern formation.
申请公布号 JPH05235510(A) 申请公布日期 1993.09.10
申请号 JP19920031240 申请日期 1992.02.19
申请人 FUJITSU LTD 发明人 MATSUMOTO KENICHI
分类号 H05K3/10;H05K3/18;H05K3/46;(IPC1-7):H05K3/18 主分类号 H05K3/10
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