发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To enhance the accuracy of an alignment operation by a method wherein, when a misalignment amount in a PR process is read out, readout patterns are arranged so that a relative displacement amount with reference to a prior process can be confirmed with reference to a displacement in a direction which could be confirmed only with reference to one's own process in conventional cases. CONSTITUTION:Mispalignment readout patterns are arranged in opposite positions on two opposite sides on a semiconductor pellet 1; they are formed so as to be adjacent, such as readout patterns 3, 5, when a wafer is exposed. Displacement amounts on opposite sides of the pellet are compared, and a displacement amount theta with reference to a prior process is found.
申请公布号 JPH05234840(A) 申请公布日期 1993.09.10
申请号 JP19920001115 申请日期 1992.01.08
申请人 NEC CORP 发明人 ISHIOKA HIROSHI
分类号 G03F9/00;H01L21/027;(IPC1-7):H01L21/027 主分类号 G03F9/00
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