发明名称 (B2) ;TSUSHINSUITSUCHIOYOBIDENSOHOHO
摘要 PURPOSE: To provide a switch which has high transmission speed and synchronizes clocks with a simple structure. CONSTITUTION: A switch 101 has a global matrix switch 116 executing communication between sections, plural ports 104 provided for the sections, matrixes 110 synthesizing them and controllers 108. Only one reference clock exists and it is synchronized with the clocks in the sections. Communication in the sections is executed in parallel and communication between the sections is asynchronously executed in series. Since communication between the sections is asynchronously executed, the mechanism controlling the transfer of a control signal is facilitated and clock synchronization at the time of data communication becomes easy.
申请公布号 JPH05235976(A) 申请公布日期 1993.09.10
申请号 JP19920180916 申请日期 1992.07.08
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 KURISUTOSU JIYON JIYOOJIOU;SOA AAN RAASEN
分类号 H04L12/64;H04Q11/04;(IPC1-7):H04L12/44 主分类号 H04L12/64
代理机构 代理人
主权项
地址