MINIMUM PULSE WIDTH VERIFICATION SYSTEM FOR LOGIC CIRCUIT,申请号JP19920072873-传众专利搜索

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发明名称	MINIMUM PULSE WIDTH VERIFICATION SYSTEM FOR LOGIC CIRCUIT
摘要
申请公布号	JPH05233751(A)	申请公布日期	1993.09.10
申请号	JP19920072873	申请日期	1992.02.24
申请人	NEC SOFTWARE LTD	发明人	HIGUCHI YOSHISHIGE
分类号	G01R31/28;G06F11/24;G06F11/25;G06F11/26;G06F17/50;(IPC1-7):G06F15/60	主分类号	G01R31/28
代理机构		代理人
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地址

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