SEMICONDUCTOR INTEGRATED CIRCUIT

摘要

PURPOSE:To reduce the area of a storage cell while maintaining a small parasitic bipolar transistor gain by making the corner diagonal between both the drain regions of a PMIS transistor of a CMIS inverter on one side and another NMIS transistor the other side thereby setting more significantly the distance between the active regions. CONSTITUTION:A corner where the drain region of PMIS1 transistor of a CMIS1 inverter on one side faces the drain region of NMIS2 transistor of a CMIS2 inverter on the other side is formed diagonally. And the distance alpha 4 between the drain region of the NMIS1 transistor of the CMIS1 inverter and the drain region of the NMIS2 transistor of the CMIS2 inverter on one side is made larger than the distance alpha between the drain region of the PMIS1 transistor of the CMIS1 inverter and the drain region of the NMIS1 transistor of the CMIS1 inverter on the other side. Thus, it becomes possible to increase the distance a alpha4 while reducing the distance alpha3.