| 摘要 |
PURPOSE:To double an input frequency band capable of frequency division by providing a changeover circuit to a pre-stage of a phase comparator and replacing a reference side input terminal of the phase comparator with a comparator side input terminal of the phase comparator. CONSTITUTION:An input reference frequency signal fr from a reference oscillator (RO) 1 is fed to a phase comparator (PC) 2 and a voltage controlled oscillator signal fo from a voltage controlled oscillator (VCO) 6 is fed back to the PC2 via a frequency divider (DIV) 9 to implement phase comparison and an output proportional to the phase difference is integrated by a filter (LPF) 3 and the result is fed to the VCO 6. In this case, a changeover circuit (SW) 5 is provided to input outputs of the RO1, the DIV9 to the reference side input terminal and the comparator side input terminal of the PC2 while switching them mutually, the set value of the DIV9 is doubled equivalently thereby doubling the variable range of the oscillating frequency. Thus, the required number of channels in doubled without improving the performance of the DIV 9 used for the PLL circuit. |
