| 摘要 |
<p>PURPOSE:To reduce a cell abort rate by shortening a cell delay time while keeping a buffering quantity in a 1st stage k-sets of nXm switches of 3-stage configuration is kept the same as that of a conventional switch. CONSTITUTION:A 1st stage of the cell switches consists of k-sets of nXm switches, a 2nd stage consists of m-sets of kXk switches and a 3rd stage consists of k-sets of mXn switches, and a buffering means buffering cells inputted to its inside is provided respectively to the 1st stage k-sets of nXm switches, a route allocation circuit 5021 allocates a transfer route for cells buffered in the buffering means of the 1st stage of k-sets of nXm switches to the 2nd stage of m-sets of kXk switches, and a maximum cell storage switch detection circuit 5011 detects a switch whose cell storage number is maximum among the k-sets of nXm switches of the 1st stage, and the transfer route is allocated at first to cells in the switch whose cell storage number is maximum in the k-sets of nXm switches of the 1st stage.</p> |
