发明名称 Method for manufacturing a semiconductor memory device
摘要 In a method for manufacturing DRAMs in a stacked memory cell type, an edge portion of each bit line is bared upon etching a first insulating film, the bared edge portion is etched to from an opening and an inner peripheral surface of the opening is covered by a second insulating film. There is also disclosed a method wherein second and third insulating films and second conductive film are stacked on a first insulating film, a second conductive film is formed and the second conductive film and the first conductive film are partially etched whereby the unetched portions of the first conductive film serve as electrode planes of charge storage electrodes.
申请公布号 US5242852(A) 申请公布日期 1993.09.07
申请号 US19920944883 申请日期 1992.09.11
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO. LTD. 发明人 MATSUYAMA, KAZUHIRO;FUKUMOTO, MASANORI;NAITO, YASUSHI;OGAWA, HISASHI;OKADA, SHOZO
分类号 H01L21/02;H01L21/768;H01L21/8242 主分类号 H01L21/02
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