| 摘要 |
<p>A read only memory device including : a memory cell array (21) having a plurality of memory cells each storing one of three states ; selection means (31,22), connected to the memory cell array, for selecting a pair of memory cells from the memory cell aray simultaneously in accordance with an address signal ; a first sense amplifier (SA1), operatively connected to one of the pair of the memory cells, for producing a three bit output (S0, S1, S2) corresponding to the state stored in the one of the pair of the memory cells selected by the selection means ; and a second sense amplifier (SA2), operatively conncected another of the pair of memory cells, for producing a three bit output (S'0, S'1, S'2) corresponding to the state stored in the another of the pair of the memory cells selected by the selection means.</p> |
