Non-volatile DRAM cell.

摘要

The present invention is directed to a one-transistor non-volatile DRAM cell (10, 40, 66, 79) having a two layer floating gate (14) to allow the contents of a storage capacitor (28) to be transferred to the floating gate (14) during power interruptions. The first layer (18) of the floating gate (14) is separated from a storage node (32) of the storage capacitor (28) by a tunnel oxide (92) to allow electron tunnelling between the floating gate (14) and the storage capacitor (32). In another embodiment of the present invention, a dual electron injector structure (44) is disposed between a one layer floating gate (42) and the storage node (32) to allow electrons to be injected between the floating gate (42) and the storage node (32). In another embodiment of the present invention, an erase gate (70) is implemented to remove the charge on the floating gate (14, 42). The erase gate (70) can be separated from the floating gate (14, 42) by a tunnel oxide (92) or a single electron injector structure (44) to allow electrons to travel from the floating gate (14, 42) to the erase gate (70). <IMAGE>