| 摘要 |
PURPOSE: To detect not only a lock state of a transmission frequency but also a lock state of a reception frequency. CONSTITUTION: This lock device for a dual PLL is provided with a reception clock detector. The reception clock detector is provided with a reset signal generating section 61 that generates a reset signal, based on a reception lock state signal of a reception phase difference detector 50, a frequency divider section 62 that frequency-divides a prescribed frequency of a reference frequency counter by a prescribed frequency division ratio based on the reset signal of the reset signal generating section 61, and a reception lock data output section 63 that provides an output of a reception lock detection signal with an output signal of the frequency divider section 62. |
