发明名称 |
PARALLEL PROCESSING DEVICE |
摘要 |
<p>PURPOSE: To interpolate digital data and to more quickly generate a new pixel value by highly efficiently inserting properly corrected pixels into an image consisting of plural pixels arranged in parallel along plural parallel lines. CONSTITUTION: A main clock 10 controls the output of image pixel data from a storage device 12 for storing original data through a signal line 11. The pixel data outputted from the device 12 are supplied to an interpolation module 16 through a signal line 23. The main clock supplies an input timing signal to the module 16 through a signal line 13 and the input timing signal is supplied also to a coefficient source module 18 through a signal line 19. A storage device may be used as the module 18. The storage device may have a set of previously calculated coefficients to be accessed as a format of a lookup table or may have plural tables having fixed values.</p> |
申请公布号 |
JPH05216984(A) |
申请公布日期 |
1993.08.27 |
申请号 |
JP19920108088 |
申请日期 |
1992.04.27 |
申请人 |
E I DU PONT DE NEMOURS & CO |
发明人 |
TEIMOSHII JIEIMUZU BAAN;MAAKU AREGUZANDAA MONSHIROBITSUCHI |
分类号 |
G09G5/36;G06F17/17;G06T1/20;G06T3/40;H04N1/387;H04N1/393 |
主分类号 |
G09G5/36 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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