发明名称 DIGITAL CHARGE PUMP TYPE PLL CIRCUIT
摘要 PURPOSE:To prevent the fluctuation of the follower clock frequency despite the fault of a reference clock. CONSTITUTION:When a reference clock has a fault, a fault detector 8 detects this fault and at the same time forcibly sets the output value of an up-down counter 5 at the digital value equivalent to the center frequency of a VCO 7. This digital value is converted into the analog voltage value by a D/A converter 6 and inputted to the VCO 7. The output frequency of the VCO 7 is fixed at the center frequency.
申请公布号 JPH05218856(A) 申请公布日期 1993.08.27
申请号 JP19920019735 申请日期 1992.02.05
申请人 NEC CORP;NIPPON DENKI TRANSMISSION ENG KK 发明人 TADA HIROYUKI;MIZUNO MAKOTO
分类号 H03L7/06;H03L7/089 主分类号 H03L7/06
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