STATIC VOLTAGE GENERATING CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE

摘要

The circuit for providing stable DRAM's bit line pre-charge voltage and cell-plate voltage against temperature and process transition comprises: a bias circuit (33) composed of the resistors (21)(22), differential amplifiers (24)(25), and PMOS and NMOS driving transistors (26)(27). The resistors provides a reference voltage of the reference node (23) as 1/2 Vcc. The reference node (23) is connected with the non inverting input of the differential amp. The driving PMOS/NMOS transistors (26)(27) is connected with power supply source in serial and the sources become output node (28) in common.