| 摘要 |
<p>PURPOSE:To execute a data communication between CPUs separated at a long distance, and to decrease the quantity of wiring for connecting housings. CONSTITUTION:The multi-CPU system is provided with a RAM 21 having a store area divided into plural blocks in accordance with each CPU, an FIFO 22 which can store CPU information of a transmitting side and a transmitting destination, a communication interface circuit 24 for transmitting and receiving data of the RAM 21 and CPU information of the FIFO 22, and a control processor 23 constituted so that the data on the block of the RAM 21 corresponding to the CPU information of the transmitting destination, the CPU information on the transmitting side and the CPU information of the transmitting destination are sent out or in the case the received CPU information of the transmitting destination is addressed to itself, the data received at that time is written in the block of the RAM 21 corresponding to the CPU information of the transmitting side received at that time, and the communication interface circuit 24 is connected to a common communication bus 3.</p> |
