发明名称 |
METHOD AND APPARATUS FOR OPTIMIZING INTER-PROCESSOR INSTRUCTION TRANSFERS |
摘要 |
606096 A METHOD AND APPARATUS FOR OPTIMIZING INTER-PROCESSOR INSTRUCTION TRANSFERS A protocol for transferring instructions between asynchronous processors in a computer system is provided. Each instruction transfer requires the transfer of an opcode and a variable number of operands. The transfer is accomplished via a bus which interconnects the processors. The opcode and operands are assembled in a buffer in the sending processor and then transferred to the receiving processor in reverse order, i.e., operands first and opcode last. The receiving processor does not acknowledge any of the transfers until it receives the opcode which is always sent last. Upon receipt of the opcode, the receiving processor knows the instruction transfer is complete and sends the acknowledge signal immediately thereafter. PD88-0418 U.S.: DIGQ:019/DIGK:035 FOREIGN: DIGW:019 |
申请公布号 |
CA1321658(C) |
申请公布日期 |
1993.08.24 |
申请号 |
CA19890606096 |
申请日期 |
1989.07.19 |
申请人 |
DIGITAL EQUIPMENT CORPORATION |
发明人 |
DICKSON, ROBERT;UHLER, GEORGE M.;DURDAN, W. HUGH |
分类号 |
G06F15/16;G06F9/38;G06F13/42;G06F15/163;G06F15/177;G06F17/16 |
主分类号 |
G06F15/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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