发明名称 |
Semiconductor memory device with readout data buses connecting local and main sense amplifiers |
摘要 |
Readout data amplified by each local sense amplifier is provided to the corresponding readout data bus. Each readout data bus is connected to a plurality of main sense amplifiers (for example, a main sense amplifier for x1 and a main sense amplifier for x2). Each main sense amplifier includes a clamp transistor for clamping the potential of the readout data bus always to a constant potential, whereby increase in speed of readout data is performed by the clamp transistor. The base potential of the clamp transistor in each main sense amplifier is controlled in response to a switching control signal. As a result, a plurality of main sense amplifiers connected to one readout data bus are switched selectively.
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申请公布号 |
US5239507(A) |
申请公布日期 |
1993.08.24 |
申请号 |
US19910654122 |
申请日期 |
1991.02.12 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
OHBA, ATSUSHI |
分类号 |
G11C11/413;G11C7/10;G11C11/401;G11C11/409;G11C11/41;H01L21/8242;H01L27/10;H01L27/108 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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