发明名称 |
Process for fabricating gate insulating structure of a charge coupled device |
摘要 |
A fabrication process includes at least a step of low pressure CVD for depositing an upper silicon oxide layer on a silicon nitride layer which is formed through a lower silicon oxide layer on a silicon substrate, a next step of forming a gate electrode on the second oxide layer, and a further step of selectively removing the second oxide layer and instead forming a similar silicon oxide layer anew. This process can meet the demand for device miniaturization, improve the C-V characteristic of a MOS capacitor and provide uniform insulating layers.
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申请公布号 |
US5238863(A) |
申请公布日期 |
1993.08.24 |
申请号 |
US19920880403 |
申请日期 |
1992.05.08 |
申请人 |
SONY CORPORATION |
发明人 |
FUKUSHO, TAKASHI;TOSHMIYA, YOSHINORI |
分类号 |
H01L21/316;H01L21/318;H01L21/339;H01L27/146;H01L29/423;H01L29/78 |
主分类号 |
H01L21/316 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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