发明名称 DATA TRANSMISSION CIRCUIT
摘要 <p>PURPOSE: To speed up data input/output processing by suppressing the generation of a DC current when write operation is executed after read-out operation in a semiconductor memory device. CONSTITUTION: This circuit is provided with sense circuits 59, 60 for sensing a potential difference between a bit line pair 53, 54, input circuits 63, 64 for inputting the data and output circuits 61, 62 for outputting the data. Then, the output circuits 61, 62 are made non-conductive by a reading column selection line signal RCSL at a write-in operation time, and common input/output line pair 65, 66 are separated electrically from the output circuits 61, 62 and the sense circuits 59, 60.</p>
申请公布号 JPH05210968(A) 申请公布日期 1993.08.20
申请号 JP19920286224 申请日期 1992.10.23
申请人 SAMSUNG ELECTRON CO LTD 发明人 YANAGI SHIYOUMON
分类号 G11C11/409;G11C7/10 主分类号 G11C11/409
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