| 摘要 |
PURPOSE:To make it possible to put a counter circuit into operation at a high frequency all the time without reference to the state of a program by dividing the counter circuit into a front stage and back state and then by setting a FF circuit when the preset condition of the back-stage counter is detected. CONSTITUTION:This counter is divided into front stage 52 and back stage 53, and the output of FF55 set by preset condition detection part 54 of back stage 53 and reset by the output of preset signal generating part 57 of front stage 52 is supplied as an input to preset condition detection part 56 of the front stage and as a preset signal for back stage 53. In this constitution, since a signal inhibiting the operation of detection part 56 is the output of FF55 reset by a preset signal outputted from generating part 57, setting the propagation delay time of the signal of FF55 sufficiently small prevents malfunction even if the number of bits of the counter would be great, putting the counter into operation at a high frequncy all the time without reference to the state of the program. |
