| 摘要 |
PURPOSE:To reduce the manhour of a design by a method wherein the wiring line lengths of at least wirings constituting signal conductors out of wirings between electrodes on a semiconductor chip and outer leads are made equal to each other. CONSTITUTION:A package base body 3 is formed into a circular from and wirings 5a, 5b..., are radially wired from the center of the package base body 3. Accordingly, the wiring line lengths of the wirings 5a, 5b,... become equal to each other. Then, electrodes 7 on a semiconductor chip 1 are arranged in a circular form from the center of the chip 1. Accordingly, the wiring line lengths of metal wirings 2a, 2b,... become equal to each other. After all, by adopting such a structure, wiring line lengths between the electrodes 7 on the chip 1 and outer leads 4 become equal to each other and a time difference between output signals in each signal conductor is eliminated. Accordingly, when wirings on a printed board are designed, a propagation delay time difference in the package base body is not necessarily considered. |
