| 摘要 |
PURPOSE:To execute a data transmission at high speed by providing a means to latch statically the signal on a bit line onto an I/O line and means to precharge the electric potential of the I/O line to the intermediate electric potential before latching. CONSTITUTION:To an I/O and the inverse of I/O line pair, the signal, which can be detected by an I/O buffer circuit 75, is sent from bit lines BL and the inverse of BL, and then, independently, the signal is latched. Thus, it is not necessary to obtain the spare allowance, and rapidly, the data can be transferred to a read data line RD. At the circuit, the electric potential of the I/O and the inverse of I/O lines is precharged to an intermediate electric potential VM of a power source electric potential and an earth electric potential by a precharging circuit 55. Thus, then a signal line CSL is led, the I/O and the inverse of I/O lines connected to the higher electric potential out of the bit liens BL and the inverse of BL are ascended to the power source electric potential from the electric potential VM without fail. Since the I/O line and the inverse of I/O line connected to the lower electric potential are descended from the electric potential VM, the time is hastened in which the necessary level difference is made. |
