| 摘要 |
PURPOSE: To arrange electric contacts prior to sensor gage formation by adher ing a dielectric insulation layer and a semiconductor layer having a high specific resistance on a substrate, annealing a semiconductor layer between the electric contacts added at the prescribed positions on the layers and by forming a sensor gate by reducing the specific resistance. CONSTITUTION: On the top plane 3 of a substrate 1, a non-conductive silicon nitride layer 5, a silicon dioxide layer 7 and a doped amorphous/polycrystalline silicon layer 9 are deposited. Then, conductive metal contacts 11 are deposited at the contact positions through a shadow mask pattern 13. Prior to forming a piezoresistance sensor, a silicon dioxide passivation layer 15 is deposited on the amorphous/polycrystalline silicon layer 9 and the metal contacts 11. The amorphous/polycrystalline silicon layer 9 exhibits low piezoresistance characteristic with high resistivity. The doped silicon is activated, made conductive by annealing process and a piezoresistance sensor is formed on the baron-doped amorphous/polycrystalline silicon layer 9. |
