发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
<p>PURPOSE:To obtain a semiconductor integrated circuit wherein the clock skew difference between individual clock nets affected by functional elements added to the individual clock nets is reduced sharply and the system design of a circuit is made easy. CONSTITUTION:A semiconductor integrated circuit 1 is constituted of the following: a clock driver 2; and a clock network 3 formed of a group composed of a plurality of clock nets 31 to 34 in which a clock signal from the clock driver 2 is distributed. In the semiconductor circuit, in order to reduce a clock skew between the clock nets, at least one dummy element 8 is added to at least one selected clock net in addition to prescribed functional elements which are added normally to the clock nets.</p> |
申请公布号 |
JPH05206414(A) |
申请公布日期 |
1993.08.13 |
申请号 |
JP19920013900 |
申请日期 |
1992.01.29 |
申请人 |
FUJITSU LTD;FUJITSU VLSI LTD |
发明人 |
TOMITA KAZUHIRO;MIYAZAKI YUJI |
分类号 |
H01L27/118;G06F1/10;H01L21/82 |
主分类号 |
H01L27/118 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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