| 摘要 |
PURPOSE:To execute the address sequence of a ROM read test with a single test vector. CONSTITUTION:RAM circuits 2-5 previously store data for address designation to show the addresses of ROM circuits 7-10. When executing the read tests of the ROM circuits 7-10, an IC tester is connected to the outside, the address of the RAM circuit is designated from the IC tester, the data for address designation are transmitted from the address to the ROM circuits 7-10, and the test is executed by extracting data from an address designated by the data for address designation to the external IC tester. Thus, the ROM read test can be executed with the single test vector. |
