发明名称 PARALLEL-CONNECTED CIRCUIT ARRANGEMENT OF COMPUTERS ON ONE COMMUNICATION BUS
摘要 A logical circuit (7) of the connection of signals of the fragmenter are connected through communication busbars (5,6) to at least two computers (1,2) linked individually to their own sources (3,4) controlled through autonomous switches (11,12) by the automatic unit (8) of the supply linked to the logical circuit (7) of the connection of signals of the fragmenter (9) supplied from the central source (10). The connection is used mainly for computers working non-stop and makes it possible to connect or disconnect computers from the network and communication busbar without technical intervention into the computers.<IMAGE>
申请公布号 CZ278111(B6) 申请公布日期 1993.08.11
申请号 CS19920000944 申请日期 1992.03.31
申请人 VYSKUMNY USTAV JADROVYCH ELEKTRARNI 发明人 HREHUS MARIAN ING.
分类号 G06F15/16;G06F13/10;(IPC1-7):G06F15/16 主分类号 G06F15/16
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