| 摘要 |
PURPOSE:To enable to increase integration by eliminating the bird beak of a field oxide film and reducing the width of an element isolation region by a method wherein the element isolation between memory cells is performed by using a P type doped layer used in an Hi-C structure. CONSTITUTION:The memory element is constructed by forming a capacitor part 101 of an MIS structure, a transfer gate part 102, and the element isolation region 103 on a semiconductor substrate 1. At the capacitor part 101, a capacitor is constructed of a deeply formed P-doped layer 5, a shallowly formed N type doped layer 6, a gate oxide film 4, and a capacitor electrode 7. The P type doped layer 5 is deeply formed also in the element isolation region 103. Therefore, said layer 5 functions as a barrier layer and thus serves for element isolation. The part without the existence of the N type doped layer 6 becomes the element isolation region 103 between adjacent capacitors. As for the width of said region 103, if the capacitor electrode 7 covering this part is at a ground potential, sufficient withstand voltage between elements can be obtained by approx. 1mum. |
