发明名称 METHOD FOR ANALYZING CIRCUIT
摘要 <p>PURPOSE:To find the optimum input impedance by the small number of times of calculation in a circuit analyzing method for analyzing the large signal characteristics of a circuit including an active element. CONSTITUTION:Various parameters are inputted (A), the I/O voltages V1, V2 of an FET are found out (B) by small signal analysis and an FET current is calculated (C). Then FET currents Iin1, Iout1 are calculated (D) by Fourier transformation and then circuit currents Iin2, Iout2 and input impedance Zin based upon a conjugate matching condition are found out (E). Then a difference between the FET currents and the circuit currents is found out as an error (F), whether the error is larger than an allowable value Y or not is judged (G), and when the error is larger, the voltages V1, V2 are recalculated (H) by using a Neuton method and then the step (H) is returned to the step (C). When the error is smaller, the I/O characteristics of the currents and voltages and the matching impedance of an input circuit are outputted (I).</p>
申请公布号 JPH05197779(A) 申请公布日期 1993.08.06
申请号 JP19920007458 申请日期 1992.01.20
申请人 FUJITSU LTD 发明人 SHIMIZU MASAHIKO;OHORA YOSHIMASA;NAGATOMO KAZUO;SHIMURA TOSHIHIRO
分类号 G06F17/10;G06F17/50;G06F19/00 主分类号 G06F17/10
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