发明名称 ARCHITECTURE OF DISK ARRAY CONTROLLER
摘要 PURPOSE: To construct a variable data line between a host system and a disk drive in a disk array by performing array read/write, which is requested in accordance with a protocol in a prescribed RAID level by the host system, under the control of an incorporated processor and a DMA control logic circuit. CONSTITUTION: A host interface logic circuit 200 converts data from the host system to multiple data words through a SCSI bus 111. Bus switches 40OU and 400L with exclusive OR circuits for parity information generation control data and parity information in a selected buffer 120 and driver busses ADRV to FDRV. The host interface logic circuit 200, bus switches 400U and 400L, and the storage buffer 120 perform the array read/write requested by the host system under the control of a processor 101 and a DMA control logic circuit 300. In this case, this read/write complies with the protocol in the prescribed RAID level.
申请公布号 JPH05197495(A) 申请公布日期 1993.08.06
申请号 JP19920237616 申请日期 1992.08.14
申请人 N C R INTERNATL INC 发明人 KIISU BII DEYURAAKU;BURETSUTO ESU UEBAA
分类号 G06F3/06;G06F11/10 主分类号 G06F3/06
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