发明名称 DELAY CIRCUIT
摘要 <p>PURPOSE:To surely obtain a signal whose delay time is more than a propagation delay time of a delay element by inputting an output of the delay element to one of inputs of a 2-input logic circuit and inputting an input signal to the other and sending an output of a storage means receiving the two outputs to the input of the delay element. CONSTITUTION:An output of a delay element 4 is inputted to one of inputs of a 2-input logic circuit 2 and an input signal from an input signal application terminal IN1 is inputted to the other input. An input signal is stored to an R-S latch 3 and delayed at the delay element 4 by a prescribed time, shaped by a buffer circuit 5 and outputted to an output terminal 6 as an output signal. Even when a signal to the terminal 1 is changed before a signal appears at an output of the delay element 4, the circuit 2 does not propagate a signal change to the latch 3. Furthermore, the circuit 2 recognizes a change in the output of the element 4 and propagates a change in the input signal to the latch 3. Thus, the signal whose delay time is more than the propagation delay time of the element 4 is surely obtained.</p>
申请公布号 JPH05199086(A) 申请公布日期 1993.08.06
申请号 JP19920007413 申请日期 1992.01.20
申请人 OLYMPUS OPTICAL CO LTD 发明人 ARISAWA YASUO
分类号 H03K5/13 主分类号 H03K5/13
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