发明名称 A/D CONVERTER
摘要 <p>PURPOSE:To realize the A/D converter unnecessitating a troublesome job such as manual adjustment by the user or the like through visual observation of an output screen with respect to a phase shift between a clock signal and a video signal changing when an input device is changed when the video signal of a computer or the like is subjected to A/D conversion with a dot clock signal. CONSTITUTION:A video signal 1 is sampled by using a clock signal resulting from a dot clock signal 4 passing through a variable delay device 6 and fixed DELTAT delay devices 13, 14 or the like, and a phase detection section 18 detects a phase shift between the video signal and the sampling clock signal by using obtained sampling values Y(n.T) 16, Y(n.T-DELTAT) 17 and Y(n.T+DELTAT) 15. Then a delay quantity control section 19 controls the variable delay deice 6 in response to the detected phase shift to sample the video signal in a proper timing.</p>
申请公布号 JPH05199119(A) 申请公布日期 1993.08.06
申请号 JP19920007586 申请日期 1992.01.20
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SHINTANI NAOKI;UEDA MITSUNORI;OGASAWARA KATSUICHI;GYOTEN TAKAAKI
分类号 H02M7/00;H02M7/12;H03M1/12;H03M1/60;H04N5/14;H04N7/00;H04N11/04 主分类号 H02M7/00
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