发明名称 SEMICONDUCTOR MEMORY
摘要 <p>PURPOSE:To prevent data from being erroneously written in a specified memory area to be used in place of a ROM by the malfunction of a CPU or the like by preventing data signals from being outputted by a write circuit receiving a write enable/disable signal when storing write inhibit information in a write enable/disable information memory cell. CONSTITUTION:This device is provided with a write enable/disable information memory cell 22 to store write enable information or write inhibit information concerning respective word lines 11, and write enable/disable judging means 18 connected to the write enable/disable information memory cell 22 and a write circuit 25. The write enable/disable judging means 18 outputs a write enable/disable signal through a write enable/disable signal line 23 to a write circuit 29 corresponding to the information stored in the write enable/disable information memory cell 22 concerning the word line 11 selected by a row decoder 13. The write circuit 29 stops the output of data signals corresponding to the write enable/disable signal.</p>
申请公布号 JPH05197628(A) 申请公布日期 1993.08.06
申请号 JP19920006808 申请日期 1992.01.17
申请人 SHARP CORP 发明人 IHARA MAKOTO
分类号 G06F12/14;G06F21/02;G11C16/02;G11C16/04;G11C16/06;G11C17/00;H01L21/8247;H01L27/115 主分类号 G06F12/14
代理机构 代理人
主权项
地址
您可能感兴趣的专利