发明名称 Multilayer rear-panel bus-board system for microprocessors - has bus plane board with connection points including connections to terminal resistors and capacitors
摘要 A bus plane system for the wiring of microprocessor units has a reverse side with connection points for microprocessor modules that is arranged in a number of fields divided into blocks. Each field has signal voltage connection points (3) and reference voltage connections (4). Multiple layers provide interconnection tracks. Terminal resistors (R1-R4) and suppressor capacitors (C) are located on the front side together with connections. One side of the resistors and capacitors connect with a voltage rail (6). ADVANTAGE - Provides minimum signal distortions.
申请公布号 DE4202524(A1) 申请公布日期 1993.08.05
申请号 DE19924202524 申请日期 1992.01.30
申请人 SCHROFF GMBH, 7541 STRAUBENHARDT, DE 发明人 HEIDENBLUT, HOLGER, 7530 PFORZHEIM, DE;ROEHRICH, MANFRED, DIPL.-ING. (TH), 7501 MARXZELL, DE;SPRENGEL, OLAF, DIPL.-ING. (FH), 7541 STRAUBENHARDT, DE
分类号 G06F13/40;H05K1/02;H05K7/14 主分类号 G06F13/40
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