| 摘要 |
<p>In a data processor (21) in a multi-processing system (10), a method is provided for controlling operation of a data tag memory array (42) and a snoop tag memory array (40) such that snoop, and read or write operations may be concurrently performed without a loss of either functionality or system performance. When using the method, separate address and data tenures are recognized on a pipelined bus used to interconnect each element of multi-processing system (10). Therefore, when data processor (21) has ownership of an external address bus (14), a snoop tag value may be concurrently written to snoop tag cache (40). Similarly, when data processor (21) has ownership of an external data bus (16), a data tag value may be concurrently written to data tag cache (42). The method described herein allows multiple accesses of processor (21) to fully executed without a loss of processing time or system functionality. <IMAGE></p> |
