发明名称 DIGITAL SIGNAL PROCESSOR
摘要 PURPOSE:To easily deal with various arithmetic processings and to improve a data processing amount per unit time by calculating the contents of a memory while parallelly inputting them to plural computing elements, and storing the arithmetic result in the memory. CONSTITUTION:The input/output lines of plural computing elements 5 and 6 are connected to a (y) direction bus life, and the input/output lines of respective groups in a memory 4 are connected to an (x) direction bus line. Then, either the input or the output of a sequence controller is connected to either the (x) direction bus line or the (y) direction bus line at least, and a switch is provided at the prescribed position of the cross of the (x) direction and (y) direction bus lines. The sequence controller successively selects the address of the memory 4 and the switch, the contents of the memory 4 are calculated by being parallelly inputted to the plural computing elements 5 and 6, and the arithmetic result is stored in the memory 4. Therefore, data can be supplied to the computing elements 5 and 6 almost without being stopped.
申请公布号 JPH05189200(A) 申请公布日期 1993.07.30
申请号 JP19920196623 申请日期 1992.07.23
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KAWAMOTO KINJI;KANEAKI TETSUHIKO;TAKAGI YOSHIYUKI
分类号 G06F7/00;G06F17/10 主分类号 G06F7/00
代理机构 代理人
主权项
地址