| 摘要 |
<p>PURPOSE:To eliminate time required for synchronizing with a reference clock because a control signal adjusted beforehand to a synchronized clock signal is inputted to a peripheral circuit by controlling the input clock signal of a sub MPU so as to synchronize the output clock signal of the sub MPU with the output clock signal of a main MPU. CONSTITUTION:The output clock signal of the main MPU 2 connected to an oscillator 1 and the output clock signal of the sub MPU 8 connected to a voltage controlled oscillator 7 are inputted to a phase comparator 5, and two output clock signals are compared with each other, and by controlling the clock signal to be inputted to the sub MPU 8 by supplying a result to the voltage controlled oscillator 7 through an integration circuit 4, the output clock signal of the sub MPU 8 is synchronized with the output clock signal outputted from the main MPU 2.</p> |
