发明名称 CLOCK REPRODUCING DEVICE
摘要 PURPOSE:To use a digital phase detector operated at 1/2 of a symbol speed so that a clock can be reproduced even against a demodulating signal of a high speed, in the clock reproducing device for which a phase-locked loop is used for controlling optimumly a phase of a reproducing clock from a zero crossing point of a demodulating signal. CONSTITUTION:A phase-locked loop is constituted of a phase detector 7 operated by a clock of 1/2 of a symbol speed, a loop filter 2, a D/A converter 3, a VCO 4, a first frequency divider 6, and a second frequency divider 5. An output of a first frequency divider 5 becomes a reproducing clock controlled optimumly by phase different data from the phase detector 7.
申请公布号 JPH05191398(A) 申请公布日期 1993.07.30
申请号 JP19920001484 申请日期 1992.01.08
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TATSUTA AKIHIRO;SHIOMI TOMONORI;NAGAISHI YASUO
分类号 H03L7/06;H03L7/08;H04L7/08 主分类号 H03L7/06
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