| 摘要 |
<p>PURPOSE:To reduce the number of access time to mutual connecting network by collating an execution state code and a execution state identification code which is previously set and recognizing the execution state of a processor. CONSTITUTION:When the generation of the processor execution state identification code is finished, a transmission source processor 21 requires the access right of a system bus 22 to a bus arbiter 23. After obtaining the access right, the transmission source processor 21 outputs the processor execution state identification code on to the system bus 22 as address information. The processor execution state information decoder 25 of another processor 21 connected with the system bus 22 inputs the processor execution state identification code from the system bus 22. By decoding the code, the processor identification code and the execution state identification code of the transmission source are generated and transferred to CPU 24. In CPU 24 in the processor 21 on the side of reception side, the execution state of the transmission source processor is recognized based on processor identification code and the execution state identification code of the transmission source.</p> |
