发明名称 FLASH MEMORY
摘要 <p>PURPOSE:To guarantee the number of times of reload with high accuracy and to prevent a cell transistor erased excessively from occurring when comprehensive erasure is performed. CONSTITUTION:This memory is comprised in such a way that equation P1/N1= P2/N2=P3/N3=P4/N4 can be satisfied assuming the number of real cell blocks 15, 16, that of cell blocks 17 for test, and that of redundant cell blocks 18 as N1, N2, N3, and H4, and the current supply capacity of source power circuits 23, 24, 25, and 26 as Pa, P2, P3, and P4. Thereby, it is possible to equalize the current supply capacity per one cell transistor of the source power circuits 23, 24, 25, and 26.</p>
申请公布号 JPH05189983(A) 申请公布日期 1993.07.30
申请号 JP19920004216 申请日期 1992.01.13
申请人 FUJITSU LTD 发明人 AKAOGI TAKAO
分类号 G11C17/00;G11C16/02;G11C16/06;G11C29/00;G11C29/04 主分类号 G11C17/00
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